Recent improvements for wafer bonding are increasingly important in 3D IC structures. In wafer bonding, two semiconductor wafers are bonded together to form a three dimensional stack without the need for an intervening substrate or device. In applications where two different wafer types are needed, this approach can provide a single device with both functional devices in one package. In one particular application, CMOS image sensors, a substrate including an array of image sensors may be bonded to a circuit wafer so as to provide a 3D IC system that includes all of the circuitry needed to implement an image sensor in the same board area as the array of sensors, providing a complete image sensing solution in a single packaged integrated circuit device.
Wafer bonding approaches known previously include oxide-oxide or fusion bonding, and metal to metal bonding using thermocompression bonding which is performed at high pressure and using high temperatures. These prior approaches induce high mechanical and thermal stress on the devices, or fail to provide needed metal-to-metal connections.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.